1. Field of the Invention
The present invention relates to magnetic random access memory, and more particularly to a multi-bit magnetic random access memory device and a method for writing to and for sensing the multi-bit magnetic random access memory device.
2. Description of the Related Art
Rapid growth in digital information generation is likely to face a new wave of explosion in high density memory demand due to the growing popularity of mobile devices. Magnetic random access memory (MRAM) is one of the most promising candidates to provide energy efficient and non-volatile memories.
The most attractive advantages of MRAM are that the mobile device retains the current state of work when powered down, and, additionally, longer battery run-times can be provided for mobile devices from notebook computers to cell-phones, since non-volatility enables MRAM chips to consume less power than conventional Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM). MRAM operates on the principle of storing data bits using magnetic charges instead of electrical charges as used by DRAM and SRAM.
In the related art, an MRAM is known where one bit of information is stored in a magnetic multilayer cell, which comprises both magnetic and non-magnetic layers. As shown in FIG. 9, in its simplest form, a magnetic multilayer memory cell 90 includes four layers. These layers include an antiferromagnetic layer 91, and two ferromagnetic layers 92, 93 separated by a non-magnetic spacer layer 94.
The non-magnetic spacer layer 94 may either be conductive or non-conductive. In a memory having a conductive spacer, a spin-valve element is created, while a memory having a non-conductive spacer layer produces a magnetic tunnel junction (MTJ) magnetoresistive element.
One of the ferromagnetic layers 93 is exchange-coupled to the antiferromagnetic layer 91, effectively pinning the orientation of magnetization in the ferromagnetic layer 93. This ferromagnetic layer 93 is known as the pinned layer.
When an external magnetic field is applied to such a cell, the magnetization of the other ferromagnetic layer 92, the so-called free layer (the non-pinned layer), will react to the field.
Sensing or reading the information stored in the cell is based on a magnetoresistance effect.
The electrical resistance of such a multilayer cell 90 depends on the relative orientation of the magnetization in the two ferromagnetic layers 92, 93. In this case, there is low resistance when both magnetization orientations are in parallel (P) alignment and high resistance when they are in antiparallel (AP) alignment.
The building block of the MRAM architecture is its crossed-wires structure, where a magnetic element is located at the intersection point of two orthogonal wires. The writing or addressing process of an MRAM cell is accomplished by applying two orthogonal magnetic field pulses, generated by sending an electrical current, down the wires. The two wires are often referred to as the word line (Hy field, along the short axis of the magnetic element) and the bit line (Hx field, along the long axis (or easy axis) of the magnetic element).
The strength of the magnetic fields applied are such that one field alone cannot switch the magnetization of a magnetic element, but rather it requires the combination of both magnetic fields from the word and bit lines, for cell selectivity. However, the present cell writing technology relies on applying a long magnetic field pulse, tens of nanoseconds, long enough for the magnetization to reach the final equilibrium state. This method of writing is also known as the quasistatic writing which is not only slow but also not energy efficient.
Also, in such a memory having a multilayer cell structure, there is a limitation of memory density. In most cases, only one bit of information can be stored at the cross-point (the intersection point of the two orthogonal wires) in the MRAM architecture.
Recent attempts have been made to overcome this limitation of memory density. For example, U.S. Patent Publication 2003/0209769 to Nickel et al. discloses an MRAM device having a multi-bit memory cell. In particular, each memory cell includes two magnetoresistive devices connected in series.
Each of the two magneto-resistive devices has sense layers with distinctly different coercivities and, therefore, requires different writing currents. Thus, write operations can be performed selectively on the two magneto-resistive devices. Each multi-bit memory cell has four logic states with different resistance values in each state. This allows for storage of more data than a related art single-bit memory cell, which has only two logic states.
U.S. Pat. No. 5,930,164 to Zhu also discloses a magnetic memory device having four logic states and an operating method thereof. The memory device of Zhu includes a multi-bit system accomplished by stacking two or more memory cells on top of each other separated by a thick conductive layer to prevent magnetic coupling between memory cells.
In Zhu, each memory cell comprises a free magnetic data layer to store one bit of information, a hard magnetic layer as a reference layer, and a barrier layer between the free and hard magnetic layer. Essentially, each memory cell is an independent MTJ device. The memory cells have distinct coercivities, therefore allowing independent cell writing by one or two magnetic fields. For sensing or reading process, these memory cells have different Magnetoresistance (MR) ratios, therefore creating four resistance states for sensing of multi-bit information. The writing method, however, relies on a quasistatic writing method which is not only slow, but also not energy efficient.
U.S. Pat. No. 5,703,805 to Tehrani et al. discloses a method for detecting information stored in an MRAM cell having two magnetic layers with different thicknesses.
In the Tehrani et al. device, there are two magnetic data layers separated by a non-magnetic spacer. Each magnetic data layer can store one bit of information. A writing process for this device uses differing coercive forces for the two magnetic data layers, hence, independent writing is possible using a quasistatic method. A quasistatic writing method relies on applying a long magnetic field pulse of several nanoseconds that is long enough for the magnetization of a cell to reach a final equilibrium state. As noted above, this method of switching is not only slow, but also not energy efficient.
Further, the reading process of the Tehrani et al. device is very complex since six magnetic fields are required to determine the state in each data layer separately. This creates a slow and inefficient reading process.
Finally, U.S. Pat. No. 6,590,806 to Bhattacharyya discloses a device having two magnetic data layers separated by a pair of antiferromagnetically coupled magnetic layers. The two free magnetic data layers have distinct coercivities and hence, independent writing is possible.
The Bhattacharyya device has four resistance states depending on the magnetic configuration of the free data layers to the antiferromagnetically coupled layers. Therefore, the reference layer for the magnetoresistance effect are the pair of antiferromagnetic coupled layers. This means that if this device is to be used for additional data layers, each data layer requires one pair of antiferromagnetic layers, providing for a complicated device structure. Also, the device relies on the conventional quasistatic writing method.
Further, the manufacturing process of related art MRAM devices has only been known to produce low yields of the memory due to high sensitivity to cell defects, which causes domain nucleation, and hence, wide switching field distribution.